A soft error tolerant SRAM design in 130NM CMOS technology
➤ Gửi thông báo lỗi ⚠️ Báo cáo tài liệu vi phạmNội dung chi tiết: A soft error tolerant SRAM design in 130NM CMOS technology
A soft error tolerant SRAM design in 130NM CMOS technology
VIETNAM NATIONAL UNIVERSITY - HO CHI MINH CITYUNIVERSITY OF SCIENCELÊ THỊ LINH ANA SOFT ERROR TOLERANT SRAM DESIGN IN 130NM CMOS TECHNOLOGYSpecializat A soft error tolerant SRAM design in 130NM CMOS technology tion: Electronic Engineering - Microelectronics MajorCode: 60 52 70MASTER DEGREE THESISELECTRONICS ENGINEERING - MICROELECTRONICSSUPERVISORDr. BÙI TRỌNG TÚHo Chi Minh City. 2010ACKNOWLEDGEMENTSIt is my pleasure to thank all the people who made this thesis possible.I irsl of all, I would like to sinc A soft error tolerant SRAM design in 130NM CMOS technology erely express my appreciation to my advisor. Dr. Bui Trong Tu, for his tremendous support, valuable guidance and constant encouragement during my studA soft error tolerant SRAM design in 130NM CMOS technology
ies. His technical advice made my master's studies a meaningful learning experience.I am also grateful to Prof. Dang Luong Mo. Prof. Nguyen Huu PhuongVIETNAM NATIONAL UNIVERSITY - HO CHI MINH CITYUNIVERSITY OF SCIENCELÊ THỊ LINH ANA SOFT ERROR TOLERANT SRAM DESIGN IN 130NM CMOS TECHNOLOGYSpecializat A soft error tolerant SRAM design in 130NM CMOS technology voted professors, who arc the experts in the IC industry.I also wish to thank my colleagues in TCAM team for all helpful discussion and valuable advice during my study. Appreciation is expressed for Silicon Design Solutions Company who have supported me about financial and let me join in this Master A soft error tolerant SRAM design in 130NM CMOS technology course during my work.Finally, my special thanks to my family who have always been with me throughout the difficulties and challenges of my master stA soft error tolerant SRAM design in 130NM CMOS technology
udy.Ho Chi Minh City, November 2010Le Thi LinhAnABSTRACTSoft error is a great concern for microelectronics circuits today. With the advanced developmeVIETNAM NATIONAL UNIVERSITY - HO CHI MINH CITYUNIVERSITY OF SCIENCELÊ THỊ LINH ANA SOFT ERROR TOLERANT SRAM DESIGN IN 130NM CMOS TECHNOLOGYSpecializat A soft error tolerant SRAM design in 130NM CMOS technology se of soft error. Soft errors are random and do not cause the permanent failure. However, it causes the corruption of stored information, which could turn to the failure in functionality of the cữcuits.Meanwhile, the demand for a higher reliability of electronics applications is always a non-stop re A soft error tolerant SRAM design in 130NM CMOS technology quirement. There arc a lot of critical applications that need the extreme exactly in circuit functionality, such as the circuits used in space or biomA soft error tolerant SRAM design in 130NM CMOS technology
edical equipment, as well as the military electronics and so on.Generally, soft errors in memories attracted more attention than soft errors in logic VIETNAM NATIONAL UNIVERSITY - HO CHI MINH CITYUNIVERSITY OF SCIENCELÊ THỊ LINH ANA SOFT ERROR TOLERANT SRAM DESIGN IN 130NM CMOS TECHNOLOGYSpecializat A soft error tolerant SRAM design in 130NM CMOS technology tive to particle strikes than logic. Due to that motivation, this thesis focuses to study about soft errors in memories.The thesis goes through the background knowledge of soft errors and its mitigation techniques. Then, a SRAM design with additional soft error tolerant feature will be presented, rh A soft error tolerant SRAM design in 130NM CMOS technology e SRAM is designed in IBOnm CMOS technology, using ckcuit hardening and error correcting code techniques to mitigate the soft error effect. The soft eA soft error tolerant SRAM design in 130NM CMOS technology
rror tolerant level is verified by some simulations. Not only focus on the soft error tolerant circuits, a whole SRAM architecture will be shown in deVIETNAM NATIONAL UNIVERSITY - HO CHI MINH CITYUNIVERSITY OF SCIENCELÊ THỊ LINH ANA SOFT ERROR TOLERANT SRAM DESIGN IN 130NM CMOS TECHNOLOGYSpecializat A soft error tolerant SRAM design in 130NM CMOS technology of contentsAbbreviationsList of tablesList of figuresC HAPTER 1 - INTRODUCTION..............................................11.1.Problem and motivation..........................................11.2.Contribution of the thesis......................................21.3.Thesis organization............. A soft error tolerant SRAM design in 130NM CMOS technology ................................2VIETNAM NATIONAL UNIVERSITY - HO CHI MINH CITYUNIVERSITY OF SCIENCELÊ THỊ LINH ANA SOFT ERROR TOLERANT SRAM DESIGN IN 130NM CMOS TECHNOLOGYSpecializatVIETNAM NATIONAL UNIVERSITY - HO CHI MINH CITYUNIVERSITY OF SCIENCELÊ THỊ LINH ANA SOFT ERROR TOLERANT SRAM DESIGN IN 130NM CMOS TECHNOLOGYSpecializatGọi ngay
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